1. Field of the Invention
The present invention relates to a reference current source circuit including Metal Oxide Semiconductor Field Effect Transistors operated in a subthreshold region.
2. Description of the Related Art
As a technique for remarkably reducing the power consumption of a circuit system, there has been a method of designing a circuit system on such an assumption that a Metal Oxide Semiconductor Field Effect Transistor (referred to as a MOSFET hereinafter) is operated in the subthreshold region. Electrical characteristics of a MOSFET in the subthreshold region have such a problem that the characteristics sensitively vary with respect to temperature changes and process variations. In order to stably operate such a circuit system, it is required to consistently supply a constant current in all of possible environments. Therefore, it is required to constitute a reference current source circuit that has very low power consumption and stably operates with respect to temperature changes and power supply voltage fluctuations.
Prior art documents related to the present invention are listed below:    Japanese patent laid-open publication No. JP 2010-231774-A (referred to as a Patent Document 1 hereinafter);    United States patent application publication No. US2010/0225384 A1 (referred to as a Patent Document 2 hereinafter);    K. Ueno et al., “A 300-nW, 15-ppm/° C., 20-ppm/V CMOS voltage reference circuit consisting of subthreshold MOSFETs”, IEEE Journal of Solid-State Circuits, Vol. 44, No. 7, pp. 2047-2054, July 2009 (referred to as a Non-Patent Document 1 hereinafter);    Toyoaki Kito, et al., “Current reference circuit by using temperature characteristics of carrier mobility”, Proceedings of the 2009 IEICE general conference, A-1-40, The Institute of Electronics, Information and Communication Engineers (IEICE), March 2009 (referred to as a Non-Patent Document 2 hereinafter);    Y. Taur et al., “Fundamentals of modern VLSI devices”, Cambridge University Press, 2002, pp. 19-20 (referred to as a Non-Patent Document 3 hereinafter);    C. H. Lee et al., “All-CMOS temperature independent current reference”, Electronics Letters, Vol. 32, No. 14, pp. 1280-1281, July 1996 (referred to as a Non-Patent Document 4 hereinafter);    J. Georgious et al., “A resistorless low current reference circuit for implantable devices”, in Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS), Vol. 3, pp. 193-196, May 2002 (referred to as a Non-Patent Document 5 hereinafter);    W. M. Sansen et al., “A CMOS Temperature-Compensated Current Reference”, IEEE Journal of Solid-State Circuits, Vol. 23, No. 3, pp. 821-824, June 1988 (referred to as a Non-Patent Document 6 hereinafter); and    H. J. Oguey et al., “CMOS Current Reference Without Resistance”, IEEE Journal of Solid-State Circuits, Vol. 32, No. 7, pp. 1132-1135, July 1997 (referred to as a Non-Patent Document 7).
There has been proposed a voltage source circuit that outputs a threshold voltage of a MOSFET at an absolute zero temperature (See the Non-Patent Document 1). It is proposed to utilize this voltage source circuit as a voltage source, and a current flowing through this voltage source circuit has characteristics stable to LSI manufacturing process variations and power supply voltage fluctuations. However, when the voltage source circuit is used as a current source, a current flowing through the voltage source circuit has a temperature characteristic, and this has led such a problem that the amount of current increases when the temperature rises.
Considering this situation, there has been proposed a current source circuit for improving the changes in the temperature characteristic (See the Patent documents 1 and 2, and the Non-Patent Document 2). This current source circuit utilizes a difference in a dependence of a temperature and a degree of electron transfer (referred to as an electron mobility hereinafter), which is a conduction carrier of an n-channel MOSFET (referred to as an nMOS transistor hereinafter), and a dependence of a temperature and a degree of hole transfer (referred to as a hole mobility hereinafter), which is a conduction carrier of a p-channel MOSFET (referred to as a pMOS transistor hereinafter). Since the dependence of the temperature and the electron mobility, and the dependence of the temperature and the hole mobility are different from each other, the current source circuit of the Patent documents 1 and 2, and the Non-Patent Document 2 controls a temperature characteristic of an outputted reference current by generating currents dependent on the respective mobilities, and subtracting one of these currents from another one of these currents.
However, this current source circuit requires using two current source circuits that have complementary structures for generating the currents dependent on the mobilities of two kinds, and requires using a current subtracting circuit for the subtraction of the currents, and this leads to such a problem that the circuit area and the power consumption increase.